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for power management applicat ion 1 ver. 1.6, 2014-06-01 control integrated power system (cipos?) IGCM06F60GA datasheet
cipos? IGCM06F60GA datasheet 2 ver. 1.6, 2014-06-01 table of contents cipos? control integr ated power system ........................................................................................ ................ 3 features .............................................................................................................................. ................................ 3 target applications .............................................................................................................................. ............. 3 description .............................................................................................................................. ........................... 3 system configuration .............................................................................................................................. ......... 3 pin confi guration ............................................................................................................. ....................................... 4 internal electri cal schematic ................................................................................................. ................................ 4 pin assi gnment ................................................................................................................ ....................................... 5 pin description .............................................................................................................................. .................... 5 hin(u,v,w) and lin(u,v,w) (l ow side and high side cont rol pins, pin 7 - 12) ................................................ 5 vfo (fault-output and ntc, pi n 14) ............................................................................................ ..................... 6 itrip (over current detec tion function , pin 15) ............................................................................... ................. 6 vdd, vss (low side control supply and reference, pin 13, 16) .................................................................. ..... 6 vb(u,v,w) and vs(u,v,w) (high side supplies, pin 1 - 6) ....................................................................... ........ 6 nw, nv, nu (low side emitter, pi n 17 - 19) .................................................................................... ................. 6 w, v, u (high side emitter and lo w side collector , pin 20 - 22) ............................................................... ......... 6 p (positive bus input voltage, pin 23) ................................................................................................................ 6 absolute maximum ratings ............................................................................................................................... .... 7 module section .............................................................................................................................. .................... 7 inverter section ............................................................................................................................... ................... 7 control section .............................................................................................................................. .................... 7 recommended operat ion conditions .............................................................................................. .................... 8 static para meters ............................................................................................................. ...................................... 9 dynamic parameters ............................................................................................................ ................................ 10 bootstrap pa rameters .......................................................................................................... ................................ 10 thermistor ............................................................................................................................... .............................. 11 mechanical characteristics and ratings ............................................................................................................ 11 circuit of a typi cal application .............................................................................................. ............................. 12 switching tim es defini tion .................................................................................................... .............................. 12 electrical char acteristic ..................................................................................................... .................................. 13 package ou tline ............................................................................................................... ..................................... 14
cipos? IGCM06F60GA datasheet 3 ver. 1.6, 2014-06-01 cipos? c ontrol i ntegrated po wer s ystem dual in-line intelligent power module 3 -bridge 600v / 6a features fully isolated dual in-line molded module ? infineon reverse conducting igbts with monolithic body diode ? rugged soi gate driver technology with stability against transient and negative voltage ? allowable negative vs potential up to -11v for signal transmission at vbs=15v ? integrated bootstrap functionality ? over current shutdown ? temperature monitor ? under-voltage lockout at all channels ? low side emitter pins accessible for all phase current monitoring (open emitter) ? cross-conduction prevention ? all of 6 switches turn off during protection ? lead-free terminal plating; rohs compliant target applications ? dish washers ? refrigerators ? fans ? low power motor drives description the cipos? module family offers the chance for integrating various power and control components to increase reliability, optimize pcb size and system costs. it is designed to control three phase ac motors and permanent magnet motors in variable speed drives for applications like a refrigerator and a dish washer. the package concept is specially adapted to power applications, which need good thermal conduction and electrical isolation, but also emi- save control and overload protection. the features of infineon reverse conducting igbt are combined with an optimized soi gate driver for excellent electrical performance. system configuration ? 3 half bridges with reverse conducting igbt ? 3 soi gate driver ? thermistor ? pin-to-heasink creepage distance typ. 1.6mm
cipos? IGCM06F60GA datasheet 4 ver. 1.6, 2014-06-01 pin configuration bottom view figure 1: pin configuration internal electrical schematic figure 2: internal schematic
cipos? IGCM06F60GA datasheet 5 ver. 1.6, 2014-06-01 pin assignment pin number pin name pin description 1 vs(u) u-phase high side floating ic supply offset voltage 2 vb(u) u-phase high side floating ic supply voltage 3 vs(v) v-phase high side floating ic supply offset voltage 4 vb(v) v-phase high side floating ic supply voltage 5 vs(w) w-phase high side floating ic supply offset voltage 6 vb(w) w-phase high side floating ic supply voltage 7 hin(u) u-phase high side gate driver input 8 hin(v) v-phase high side gate driver input 9 hin(w) w-phase high side gate driver input 10 lin(u) u-phase low side gate driver input 11 lin(v) v-phase low side gate driver input 12 lin(w) w-phase low side gate driver input 13 vdd low side control supply 14 vfo fault output / temperature monitor 15 itrip over current shutdown input 16 vss low side control negative supply 17 nw w-phase low side emitter 18 nv v-phase low side emitter 19 nu u-phase low side emitter 20 w motor w-phase output 21 v motor v-phase output 22 u motor u-phase output 23 p positive bus input voltage 24 nc no connection pin description hin(u,v,w) and lin(u,v,w) (low side and high side control pins, pin 7 - 12) these pins are positive logic and they are responsible for the control of the integrated igbt. the schmitt-trigger input thresholds of them are such to guarantee lsttl and cmos compatibility down to 3.3v controller outputs. pull-down resistor of about 5k ? is internally provided to pre-bias inputs during supply start-up and a zener clamp is provided for pin protection purposes. input schmitt- trigger and noise filter provide beneficial noise rejection to short input pulses. the noise filter suppresses control pulses which are below the filter time t filin . the filter acts according to figure 4. ? ? k 5 figure 3: input pin structure figure 4: input filter timing diagram
cipos? IGCM06F60GA datasheet 6 ver. 1.6, 2014-06-01 it is recommended for proper work of cipos? not to provide input pulse-width lower than 1us. the integrated gate drive provides additionally a shoot through prevention capability which avoids the simultaneous on-state of two gate drivers of the same leg (i.e. ho1 and lo1, ho2 and lo2, ho3 and lo3). when two inputs of a same leg are activated, only former activated one is activated so that the leg is kept stea dily in a safe state. a minimum deadtime insertion of typically 380ns is also provided by driver ic, in order to reduce cross- conduction of the external power switches. vfo (fault-output and ntc, pin 14) the vfo pin indicates a module failure in case of under voltage at pin vdd or in case of triggered over current detection at it rip. a pull-up resistor is externally required to bias the ntc. figure 5: internal circuit at pin vfo the same pin provides direct access to the ntc, which is referenced to vss. an external pull-up resistor connected to +5v ensures, that the resulting voltage can be directly connected to the microcontroller itrip (over current detection function, pin 15) cipos? provides an ov er current detection function by connecting the itrip input with the motor current feedback. the itrip comparator threshold (typ. 0.47v) is referenced to vss ground. an input noise filter (typ: t itripmin = 530ns) prevents the driver to detect false over-current events. over current detection gener ates a shut down of all outputs of the gate driver after the shutdown propagation delay of typically 1000ns. the fault-clear time is set to typical 65us. vdd, vss (low side control supply and reference, pin 13, 16) vdd is the low side supply and it provides power both to input logic and to low side output power stage. input logic is re ferenced to vss ground. the under-voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of v dduv+ = 12.1v is present. the ic shuts down all the gate drivers? power outputs, when the vdd supply voltage is below v dduv- = 10.4v. this prevent s the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. vb(u,v,w) and vs(u,v,w) (high side supplies, pin 1 - 6) vb to vs is the high side supply voltage. the high side circuit can float with respect to vss following the external high side power device emitter voltage. due to the low power c onsumption, the floating driver stage is supplied by integrated bootstrap circuit. the under-voltage detection operates with a rising supply threshold of typical v bsuv+ = 12.1v and a falling threshold of v bsuv- = 10.4v. vs(u,v,w) provide a high robustness against negative voltage in respect of vss of -50v transiently. this ensures very stable designs even under rough conditions. nw, nv, nu (low side emitter, pin 17 - 19) the low side emitters are available for current measurements of each phase leg. it is recommended to keep the connection to pin vss as short as possible in order to avoid unnecessary inductive voltage drops. w, v, u (high side emitter and low side collector, pin 20 - 22) these pins are motor u, v, w input pins p (positive bus input voltage, pin 23) the high side igbt are connected to the bus voltage. it is noted that the bus voltage does not exceed 450 v. vfo cipos? vss > 1 from uv -detection vdd r on ,flt from itrip -latch thermistor
cipos? IGCM06F60GA datasheet 7 ver. 1.6, 2014-06-01 absolute maximum ratings (v dd = 15v and t j = 25c, if not stated otherwise) module section description condition symbol value unit min max storage temperature range t stg -40 125 c insulation test voltage rms, f = 60hz, t =1min v isol 2000 - v operating case temperature range refer to figure 6 t c -40 100 c inverter section description condition symbol value unit min max max. blocking voltage i c = 250a v ces 600 - v dc link supply voltage of p-n applied between p-n v pn - 450 v dc link supply voltage (surge) of p-n applied between p-n v pn(surge) - 500 v output current t c = 25c, t j < 150c t c = 100c, t j < 150c i c -6 -4 6 4 a maximum peak output current less than 1ms i c -12 12 a short circuit withstand time 1 vdc ? 400v, t j = 150c t sc - 5 s power dissipation per igbt p tot - 23.6 w operating junction temperature range t j -40 150 c single igbt thermal resistance, junction-case r thjc - 5.3 k/w control section description condition symbol value unit min max module supply voltage v dd -1 20 v high side floating supply voltage (vb vs. vs) v bs -1 20 v input voltage lin, hin, itrip v in v itrip -1 -1 10 10 v switching frequency f pwm - 20 khz 1 allowed number of short circuits: <1000; time between short circuits: >1s.
cipos? IGCM06F60GA datasheet 8 ver. 1.6, 2014-06-01 recommended operation conditions all voltages are absolute voltages referenced to v ss -potential unless otherwise specified. description symbol value unit min typ max dc link supply voltage of p-n v pn 0 - 400 v high side floating supply voltage (v b vs. v s ) v bs 13.5 - 18.5 v low side supply voltage v dd 14.0 16 18.5 v control supply variation v bs, v dd -1 -1 - 1 1 v/s logic input voltages lin,hin,itrip v in v itrip 0 0 - 5 5 v between vss - n (including surge) v ss -5 - 5 v figure 6: t c measurement point 2 2 any measurement except for the specified point in figure 6 is not relevant for the temperature verification and brings wrong or different information.
cipos? IGCM06F60GA datasheet 9 ver. 1.6, 2014-06-01 static parameters (v dd = 15v and t j = 25c, if not stated otherwise) description condition symbol value unit min typ max collector-emitter saturation voltage i out = 4a t j = 25c 150c v ce(sat) - - 1.6 1.8 2.0 - v emitter-collector forward voltage i out = -4a t j = 25c 150c v f - - 1.75 1.8 2.2 v collector-emitter leakage current v ce = 600v i ces - - 1 ma logic "1" input voltage (lin,hin) v ih - 2.1 2.5 v logic "0" input voltage (lin,hin) v il 0.7 0.9 - v itrip positive going threshold v it,th+ 400 470 540 mv itrip input hysteresis v it,hys 40 70 - mv v dd and v bs supply under voltage positive going threshold v dduv+ v bsuv+ 10.8 12.1 13.0 v v dd and v bs supply under voltage negative going threshold v dduv- v bsuv- 9.5 10.4 11.2 v v dd and v bs supply under voltage lockout hysteresis v dduvh v bsuvh 1.0 1.7 - v input clamp voltage (hin, lin, itrip) iin = 4ma v inclamp 9.0 10.1 12.5 v quiescent vb x supply current (vb x only) h in = 0v i qbs - 300 500 a quiescent v dd supply current (vdd only) l in = 0v, h inx =5v i qdd - 370 900 a input bias current v in = 5v i in+ - 1 1.5 ma input bias current v in = 0v i in - - 2 - a itrip input bias current v itrip = 5v i itrip+ - 65 150 a vfo input bias current v fo = 5v, v itrip = 0v i fo - 60 - a vfo output voltage i fo = 10ma, v itrip = 1v v fo - 0.5 - v
cipos? IGCM06F60GA datasheet 10 ver. 1.6, 2014-06-01 dynamic parameters (v dd = 15v and t j = 25c, if not stated otherwise) description condition symbol value unit min typ max turn-on propagation delay time v lin,hin = 5v; i out = 4a, v dc = 300v t on - 650 - ns turn-on rise time t r - 20 - ns turn-on switching time t c(on) 100 ns reverse recovery time t rr 130 ns turn-off propagation delay time v lin,hin = 0v; i out = 4a, v dc = 300v t off - 680 - ns turn-off fall time t f - 180 - ns turn-off switching time t c(off) 220 ns short circuit propagation delay time from v it,th+ to 10% i sc t scp - 1420 - ns input filter time itrip v itrip = 1v t itripmin - 530 - ns input filter time at lin, hin for turn on and off v lin,hin = 0v & 5v t filin - 290 - ns fault clear time after itrip-fault v itrip = 1v t fltclr 40 65 200 s deadtime between low side and high side dt pwm 1.0 - - s deadtime of gate drive circuit dt ic 380 ns igbt turn-on energy (includes reverse recovery of diode) v dc = 300v, i c = 4a, t j = 25c 150c e on - - 75 130 - - j igbt turn-off energy v dc = 300v, i c = 4a, t j = 25c 150c e off - - 120 190 - - j diode recovery energy v dc = 300v, i c = 4a, t j = 25c 150c e rec - - 40 70 - - j bootstrap parameters (t j = 25c, if not stated otherwise) description condition symbol value unit min typ max repetitive peak reverse voltage v rrm 600 v bootstrap resistance of u-phase 1 vs2 or vs3 = 300v, t j = 25c vs2 and vs3 = 0v, t j =25c vs2 or vs3 = 300v, t j = 125c vs2 and vs3 = 0v, t j = 125c r bs1 35 40 50 65 ?? reverse recovery time i f = 0.6a, di/dt = 80a/s t rr_bs 50 ns forward voltage drop i f =20ma, vs2 and vs3=0v v f_bs 2.6 v 1 r bs2 and r bs3 have same values to r bs1 .
cipos? IGCM06F60GA datasheet 11 ver. 1.6, 2014-06-01 thermistor description condition symbol value unit min typ max resistor t ntc = 25c r ntc - 85 - k ? b-constant of ntc (negative temperature coefficient) b(25/100) - 4092 - k -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0 500 1000 1500 2000 2500 3000 3500 thermistor temperature [ ] thermistor resistance [ k ? ] figure 7: thermistor resistanc e ? temperature curve and table (for more information, please refer to the applic ation note ?an cipos-mini 1 technical description?) mechanical characteristics and ratings description condition value unit min typ max mounting torque m3 screw and washer 0.59 0.69 0.78 nm flatness refer to figure 8 -50 - 100 m weight - 6.15 - g figure 8: flatness measurement position 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 0 5 10 15 20 25 30 35 thermistor temperature [ ] thermistor resistance [k ? ] mi n. typ. max.
cipos? IGCM06F60GA datasheet 12 ver. 1.6, 2014-06-01 circuit of a typical application figure 9: application circuit switching times definition figure 10: switching times definition
cipos? IGCM06F60GA datasheet 13 ver. 1.6, 2014-06-01 electrical characteristic 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 1 2 3 4 5 6 7 8 9 10 11 12 t j =25 v dd =13v v dd =15v v dd =20v ic, collector - emitter current [a] v ce (sat), collector - emitter voltage [v] typ. collector ? emitter saturation voltage 0123456789101112 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v dc =300v v dd =15v high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 eon, turn on switching energy loss [mj] ic, collector current [a] typ. turn on switching energy loss 0123456789101112 600 650 700 750 800 850 900 v dc =300v v dd =15v high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 t on , turn on propagation delay time [ns] ic, collector current [a] typ. turn on propagation delay time 0123456789101112 0 100 200 300 400 500 600 700 800 900 1000 1100 high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 v dc =300v v dd =15v t c(off) , turn o ff switching time [ns] ic, collector current [a] typ. turn off switching time 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 1 2 3 4 5 6 7 8 9 10 11 12 v dd =15v t j =25 t j =150 ic, collector - emitter current [a] v ce (sat), collector - emitter voltage [v] typ. collector ? emitter saturation voltage 0123456789101112 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 v dc =300v v dd =15v eoff, turn off switching energy loss [mj] ic, collector current [a] typ. turn off switching energy loss 0123456789101112 0 50 100 150 200 250 300 350 400 v dc =300v v dd =15v high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 t c(on) , turn on switching time [ns] ic, collector current [a] typ. turn on switching time 0123456789101112 0 50 100 150 200 250 300 350 400 450 500 high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 v dc =300v v dd =15v t rr , reverse recovery time [ns] ic, collector current [a] typ. reverse recovery time 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 1 2 3 4 5 6 7 8 9 10 11 12 t j =25 t j =150 i f , emitter - collector current [a] v f , emitter - collector voltage [v] typ. emitter ? collector forward voltage 0123456789101112 0 20 40 60 80 100 120 140 160 180 200 v dc =300v v dd =15v high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 erec, reverse recovery energy loss [uj] ic, collector current [a] typ. reverse recovery energy loss 0123456789101112 600 800 1000 1200 1400 1600 1800 v dc =300v v dd =15v high side @t j =25 high side @t j =150 low side @t j =25 low side @t j =150 t off , turn o ff propagation delay time [ns] ic, collector current [a] typ. turn off propagation delay time 1e-7 1e-6 1e-5 1e-4 1e-3 0.01 0.1 1 10 100 1e-4 1e-3 0.01 0.1 1 10 d : duty ratio d=50% d=20% d=10% d=5% d=2% single pulse z thjc , rc-igbt transient thermal resistance [k/w] t p , pulse width [sec.] igbt transient thermal resistance at all six igbts operation
cipos? IGCM06F60GA datasheet 14 ver. 1.6, 2014-06-01 package outline
cipos? IGCM06F60GA datasheet 15 ver. 1.6, 2014-06-01 revision history previous version: datasheet ver. 1.5 major changes since the last revision page or reference description of change 8 figure 6 updated 14 package outline updated
trademarks of infineon technologies ag a urix?, c166?, canpak?, cipos?, cipurse? , coolgan?, coolmos?, coolset?, cool sic?, corecontrol?, crossave?, dave?, di-pol?, drblade?, easypim?, econobridge?, econodual?, econopack?, econopim?, eicedriver?, eupec?, fcos?, hitfet?, hybridpack?, isoface?, isopack?, i-wafer?, mipaq?, modstack?, my-d?, novalithic?, omnitune?, optiga?, optimos?, origa?, powercode?, primarion?, primepack?, primestack?, profet?, pro-sil?, rasic?, real3?, reversave?, satric?, sieget?, sipmos?, smartlewis?, solid flash?, spoc?, tempfet?, thinq!?, trenchstop?, tricore?. other trademarks a dvance design system? (ads) of agilent technologies, amba?, arm?, multi-ice?, keil?, primecell?, realview?, thumb?, vision? of arm limited, uk. ansi? of american national standards institute. autosar? of autosar development partnership. bluetooth? of bluetooth sig inc. cat-iq? of dect forum. colossus?, firstgps? of trimble navigation ltd. emv? of emvco, llc (visa holdings inc.). epcos? o f epcos ag. flexgo? of microsoft corporation. hyperterminal? of hilgraeve incorporated. mcs? of intel corp. iec? of commission electrotechnique internationale. irda? of infrared data association corporation. iso? of international organization for standardization. matlab? of mathworks, inc. maxim? of maxim integrated products, inc. microtec?, nucleus? of mentor graphics corporation. mipi? of mipi alliance, inc. mips? of mips technologies, inc., usa. murata? of murata manufacturing co., microwave office? (mwo) of applied wave research inc., omnivision? of omnivision technologies, inc. openwave? of openwave systems inc. re d hat? of red hat, inc. rfmd? of rf micro devices, inc. sirius? of sirius satellite radio inc. solaris? of sun microsystems, inc. span sion? o f spansion llc ltd. symbian? of symbian softw are limited. taiyo yuden? of taiyo yuden co. teaklite? of ceva, inc. tektronix? o f tektronix inc. toko? of toko kabushiki kaisha ta. unix? of x/open company limited. verilog?, palladium? of cadence design systems, inc. vlynq? of texas instruments incorporated. vxworks?, wind river? of wind river systems, inc. zetex? of diodes zete x. last trademarks update 2014-07-17 edition 2014-06-01 published by infineon technologies ag 81726 mnchen, germany ? infineon technologies ag 2015. a ll rights reserved. important notice the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (?beschaffenheitsgarantie?). with respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement o f intellectual property rights of any third party. in addition, any information given in this document is subject to customer?s compliance with its obligations stated in this documen t and any applicable legal requirements, norms and standards concerning customer?s products and any use of the product o f infineon technologies in customer?s applications. the data contained in this document is exclusively intended fo r technically trained staff. it is the responsibility of customer?s technical departments to evaluate the suitability of the product fo r the intended application and the completeness of the product information given in this document with respect to such application. for further information on the product, technology, delivery terms and conditions and prices please contact your nearest infineon technologies office (www.infineon.com). warnings due to technical requirements products may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. except as otherwise explicitly approved by infineon technologies in a written document signed by authorized representatives o f infineon technologies, infineon technologies? products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. www.infineon.com

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